The previous article titled ‘Transmission line explorations’ (link) have raised various comments from a PCB manufacturer and knowledge readers. In this post I would like to cover them.
Trace height
The PCB manufacturing is a very complicated process and sometimes, we are tempted to make some simplifications. Now is the time to add some light to few aspects of it.
The PCB, depending on number of layers, is build progressively with two layer boards with copper at both sides. The copper comes preprinted in the laminates. The PCB manufacturer, according to the designer, choose 1/2-oz, 1-oz… Then they process to etch the traces, which is a chemical process. Typical trace profile is trapezoidal.
Later on, in order to metallize the vias with about 20 μm, they apply an electroplating process that adds significant amount of copper (25 to 35 μm), not only to the vias, but also to the traces, but this happens in a way that is not very uniform: there is certain tolerance in that.
From a designer point of view, all we have to do is to establish a close relationship with the PCB manufacturer, talk about our concerns, ask them for expected ranges and do a worst case analysis. Depending on the system sensitivity, eventually order a controlled impedance control (as covered in this post). If you have access to a TDR (Time Domain Reflectometry) meter, make some later measurements at the doubtful traces.
Tight coupling, too much?
In the previous post I did analysis starting from 100 μm trace distance. I choose this figure because it is the minimum copper to copper distance that Lab-Circuits recommend for Class-7. However, they reported to me that they sometimes modify trace width to adapt manufacturing tolerances and parameters to customer desired impedance targets. Using this figure leaves no margin for fixing. Consequently, they recommend a pair distance between traces of 125 μm. A distance of 100 μm may appear very big in CAD screen but in practice is very small.
Once again, this reinforces the idea that ordering a PCB is not like ordering a pizza. Sometimes it is simple and there are few compromises, but as design complexity grows, more and more aspects have to be considered.
Copper roughness
The copper roughness has to do with the skin depth. At high frequency, the current does not flow uniformly across the full conductor section but does across its surface, with a exponential decay distribution. The skin depth is the distance from the surface at which current density is 1/e respect to surface one.
Skin depth depends on the conductor material (related to its dielectric constant and magnetic permeability) and varies with the square root of frequency: the higher the frequency the lower the skin depth. For copper, the skin depth at 4 GHz is 1 μm.
If copper roughness is in the order of magnitude of skin depth or higher, the path that the current has to do increases and thus, the losses grow.
There are various complex models for that behavior that take into account the way copper is rough in laminates and are more precise in a given frequency range. In my previous analysis I used Groise model which has most its validity in the 7 to 10 GHz range and requires simple data. Following image is for Huray model best suited in the 40 to 50 GHz range and I included it just to show the aspect of the roughness.
Dielectric materials and DK uniformity
The FR4 is made of a combination of a fibre glass fabric and epoxy. In many aspects this is an excellent combination but the dielectric constant (DK) of these materials are quite different.
The following image shows the aspect of the fibre glass fabric of different laminates.
Let us look at prepreg 1080, which is very common. The glass fibre density is low which means that the epoxy resin is high. Now, imagine two traces of a differential pair, one over the horizontal filaments and other over resin filled one, with less fibre density. The two traces will see a different effective dielectric constant and thus there will be a mode conversion from differential to common mode. Even worst, this effect is likely to vary from batch to batch.
To cope with this problem, the designer has three possible strategies:
Use a laminate material that is more uniform (once again talk to the PCB manufacturer) in respect to trace separations.
Slightly rotate the PCB (1 to 10 degrees are a typical values). This slightly increase PCB cost because the panel used area is higher, as boards are always paneled.
Draw traces in zigzag with an equivalent angle. Once more this slightly increases signal attenuation as trace distance is also increased.
Summary and conclusions
Design of PCBs for high speed signals is both fascinating and challenging. Knowing what’s behind the curtains in the PCB manufacturing and the physics involved may be be very helpful, specially if you combinate it with electromagnetic field simulators. But always keep critical about the results you get from them and let them challenge your knowledge.
In certain circumstances (when problems arise) you may need to complement them with bare board measurements (TDR or S-parameters).
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